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Hardware June 20, 2026

The Wire Became the Bottleneck — So AI Is Rebuilding It Out of Light

Copper is becoming the thing AI clusters trip over, so the next infrastructure race is moving light into the package: co-packaged optics and silicon photonics are turning into shipping interconnects, not just lab demos.

The fastest way to misunderstand the next AI hardware race is to stare only at the accelerator. GPUs still matter. Memory still matters. Power still matters. But inside the largest AI factories, another bottleneck is getting harder to ignore: the wire.

When a training run spans thousands, then tens of thousands, then eventually millions of accelerators, the system is no longer just a pile of chips. It is a communications machine. Every model shard, gradient update, retrieval call, and inference handoff has to move. Copper traces, retimers, pluggable optics, and hot switch cages can only absorb so much bandwidth before they become the cost, power, heat, reliability, and deployment problem.

That is why 2026 is starting to look like the year light moves from photonics conference slides into the AI interconnect stack. Not as science fiction. Not as "computing with light" replacing GPUs. As the less glamorous but more immediate shift: replacing electrical distance with optical distance wherever copper has become too lossy, hot, and fragile.

The Switch Moves Toward The Optics

NVIDIA's Quantum-X Photonics is the clearest sign that co-packaged optics has crossed from research direction into product roadmap. The InfiniBand switch family is built around 115 Tb/s of switching capacity, with 144 ports running at 800 Gb/s each, and is expected in early 2026. Instead of keeping optical conversion out in pluggable modules at the edge of the box, the design moves silicon photonics close to the switch ASIC, shrinking the electrical path before the signal becomes light.

NVIDIA's published pitch is not just more bandwidth. The company says the co-packaged approach uses four times fewer lasers, improves power efficiency by 3.5x, and increases resiliency by 10x compared with traditional optical interconnect approaches. Those are vendor claims, but the direction is easy to believe: fewer hot pluggables, shorter electrical runs, less conversion loss, and fewer active components that can fail in a cluster where a single fabric issue can idle extremely expensive compute.

This is the practical meaning of silicon photonics for AI. The network is becoming part of the compute package. Once the training cluster is large enough, the distinction between accelerator design and fabric design starts to blur.

Lightmatter Pushes The Interposer

Lightmatter is attacking the same pain point from another angle. Its Passage M1000 photonic interposer is advertised at 114 Tbps of total optical bandwidth across a 4,000 mm2 photonic interposer, with 256 optical fibers and a design meant to connect large die complexes that would be choked by conventional electrical I/O at the package edge.

The important word is interposer. Passage is not trying to win by making a prettier cable. It is trying to make optical movement a native property of the package itself, so chips, memory, and switch fabrics can be arranged around bandwidth rather than around the physical shoreline where electrical pins fit.

That matters because AI systems increasingly fail at the boundaries. A single accelerator can compute faster than the system can feed it. A rack can draw more power than the data center can deliver. A cluster can schedule more work than its fabric can move without wasting cycles. Photonic interconnects do not solve all of those problems, but they directly target the one that gets worse every time the model, context window, or parallelism strategy scales outward.

The Materials Are Catching Up

The product story is also being pulled forward by materials work. Imec and Ghent University have demonstrated thin-film lithium niobate integration on a silicon photonics platform using micro-transfer printing, including a reported 320 Gb/s unamplified optical link over 2 km of standard single-mode fiber. That is not the same thing as a deployed AI switch, but it is the kind of device-level progress that makes higher-speed, lower-power optical lanes feel less exotic.

Thin-film lithium niobate is attractive because it can produce very fast, efficient modulators. Silicon photonics is attractive because it can borrow manufacturing discipline from the semiconductor world. The hard part is putting those advantages together without inventing an impossible manufacturing flow. Imec's work points toward a path where new photonic materials can be added to silicon platforms in ways that remain compatible with industrial process thinking.

That is the quiet theme underneath the hype: photonics is useful only if it can be manufactured, packaged, tested, and repaired at data-center scale. AI does not need beautiful one-off optical demos. It needs boring, serviceable, repeatable bandwidth.

The Toolchain Is Now Part Of The Race

Hardware shifts do not become industries until design tools catch up. That is why Arizona State University's June 18 announcement about Jiaqi Gu's NSF CAREER award belongs in the same story. Gu's project is aimed at open-source electronic-photonic design automation, or EPDA, for large-scale photonics-empowered AI systems.

The framing is important. If photonic links are going to move from boutique chips into mainstream AI infrastructure, engineers need tools that understand both electronic and photonic behavior early in design. They need to reason about layout, manufacturing constraints, system performance, and architecture together. Otherwise, photonics remains a specialist craft that scales slower than the AI systems it is supposed to connect.

Open-source EPDA will not ship a switch by itself. But it is part of the same transition from lab demo to ecosystem: components, packages, switches, interposers, and design automation all have to mature at once.

Light Won The Wires, Not The Computer

There is a temptation to turn every photonics story into a claim that optical computing is about to replace electronic computing. That is not what this moment shows. Computing with light remains an active and important research area, but the near-term commercial win is narrower and more concrete: light is winning the wires.

That is still a big deal. The AI industry spent years treating networking as the thing you bought after the chips. In the largest clusters, networking is becoming one of the things that defines what the chips can do. The next generation of AI infrastructure will be judged not only by teraFLOPS, memory bandwidth, or watts per token, but by how efficiently it can move information across the machine.

The practical future is not a glowing optical brain replacing the GPU. It is a data center where copper retreats to the shortest possible distances, optics moves closer to the silicon, and the AI cluster becomes a light-connected computer. The chip stopped being the only bottleneck. Then power and memory joined the story. Now the wire has, too.

Sources

NVIDIA developer blog, "Scaling AI Factories with Co-Packaged Optics for Better Power Efficiency": https://developer.nvidia.com/blog/scaling-ai-factories-with-co-packaged-optics-for-better-power-efficiency/

NVIDIA, "Silicon Photonics Networking for Agentic AI": https://www.nvidia.com/en-us/networking/products/silicon-photonics/

Lightmatter, "Passage M1000 Photonic Superchip": https://lightmatter.co/products/m1000/

Lightmatter, "Lightmatter Unveils Passage M1000 Photonic Superchip, World's Fastest AI Interconnect": https://lightmatter.co/press-release/lightmatter-unveils-passage-m1000-photonic-superchip-worlds-fastest-ai-interconnect/

Imec, "World first: integrating thin-film LiNbO3 modulators on a silicon photonics platform using micro-transfer printing": https://www.imec-int.com/en/articles/double-world-first-integrating-lithium-niobate-and-lithium-tantalate-modulators-silicon

ASU News, "Illuminating the future of photonic AI chip design," June 18, 2026: https://news.asu.edu/b/20260618-illuminating-future-photonic-ai-chip-design

Author article handoff: https://docs.google.com/document/d/13dKU0lCDURD5gS_GOXeoHUJ2SkR5XnPr96TyiKO4hG0/edit